nervine P100 SE stereo power amplifier
This evolution uses a DC coupled JFET input transistor without input capacitor
Offset is nulled with a JFET input DC Servo opamp
General design considerations:
singleton cascoded JFET IPS
Dedicated VAS CCS
Resistive voltage spreader (more linear than typical Vbe multiplier) directly fed by the Transimpedance Stage
Lateral Mosfet Output devices.