nervine P100 SE stereo power amplifier
 

This evolution uses a DC coupled JFET input transistor without input capacitor

 

Offset is nulled with a JFET input DC Servo opamp

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General design considerations:
singleton cascoded JFET IPS

Buffered VAS
Dedicated VAS CCS

Resistive voltage spreader (more linear than typical Vbe multiplier) directly fed by the Transimpedance Stage

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Lateral Mosfet Output devices.